1. Field of the Invention
The present invention relates to differential signal systems, and in particular to scalable low voltage signaling (SLVS) and low voltage differential signal (LVDS) systems.
2. Related Art
Differential input/output (I/O) signal interfaces are widely used for reliable high speed data transfer in many forms of data communication channels. They are used in both source synchronous and asynchronous communication systems. They can be used with bandwidth extension techniques, such as equalization and pre-emphasis. As is well known, differential signaling is preferred to single-ended signaling due to its highly robust resistance to common mode noise associated with both conducted and radiated electromagnetic interference (EMI), as well as lower power dissipation compared to single-ended static complementary metal oxide semiconductor (CMOS) implementations. Further, differential signaling also produces lower EMI emissions than their single-ended counterparts due to reduced signal magnitudes and switching currents.
During transmission of data across a differential signal link, errors can often occur, thereby causing the received data to be invalid. Following reception of such invalid data, the receiver will then need to somehow communicate back to the transmitter, e.g., by sending some form of error detection signal, to notify it of the erroneous data. In a bi-directional signal link, the signal is sent back via the interconnect through which the data was originally transmitted. However, the receiver cannot send this detection signal until the transmitter has finished sending its complete data payload and released control of the differential signal link. As a result, significant amounts of invalid data, or significant amounts of valid data following reception of invalid data, could be transmitted before the transmitter is notified of the error, thereby rendering the transmitted data useless until the error has been rectified or corrected data retransmitted.